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? 2013 semiconductor components industries, llc publication order number: october - 2017, rev . 2 FAN48623/d FAN48623 ? 2500 ma synchronous tinyboost? regulator with bypass mode FAN48623 ? 2 5 00 ma, synchronous tinyboost? regulator with bypass mode features ? maximum continuous load current: 2500 ma at v in of 2. 5 v boosting v out to 3. 3 v ? max imum pulse load current of 3.5 a f o r gsm pa s (1 slot) and pmic support simultaneously, v in =3.1 v, v out =3.4 v ? up to 9 7 % ef f icient ? 4 external components: 2 520 case 0.47 h inductor and 0603 case size input and output capacitors ? input voltage range: 2. 5 v to 5.5 v ? fixed output voltage options: 3.0 v to 5.0 v ? true bypass operation w hen v in > target v out ? inte grated synchronous rectifier ? true load disconnect ? forced bypass mode ? v sel control to optimize target v out ? short - circuit protection ( scp) ? low operating quiescent current ? 16- bump, 1.81 mm x 1.81 mm, 0. 4 mm pit c h , wl csp applications ? boost for low - voltage li - ion batteries, brow nout prevention, sy s t em pmic ldos s upplies , and 2g/ 3g /4g rf pa s uppl ies ? smart phones, tablets, portable d evices description the fa n 48623 allow s systems to take advantage of new battery chemistries that can supply significant energy w hen the battery voltage is low er than the required voltage for system pow er ics. by combining built - in pow e r transistors, synchronous rectification, and low supply current , this ic provides a compact solution for systems using advanced li - ion battery chemistries. the fa n 48623 is a boost regulator designed to provide a minimum output voltage from a single - cell l i - ion battery, even w hen the battery voltage is below system minimum . t he output voltage regulation is guaranteed up to a maximum load current of 2 5 00 ma. the regulator transitions smoothly betw een by pass and normal boost mode. the device can be forced int o bypass mode to reduce quiescent current. the fa n 48623 i s available in a 16 - bump, 0.4 mm pit c h, wafer - level chip - scale package (wlcsp). figure 1. typical application ordering information part number output voltage ( 1 ) v sel0 / v sel1 operating temperature package packing device marking FAN48623uc 315 x 3.15 0 / 3.33 0 - 40c to 85 c 16- ball, 4x4 array, 0.4 mm pitch, 250 m ball, wafer - level chip - scale package (wlcsp) tape & reel jk FAN48623uc 32j x 3.2 0 / 3.413 jd FAN48623uc 33 x 3.3 00 / 3. 489 je FAN48623uc35x 3.5 / 3.7 jf FAN48623uc36fx 3.6 4 / 3. 709 jg FAN48623uc5 0 x 5 .0 00 / 5.286 jl FAN48623uc50gx 5.0 00 / 5.190 jm no t e : 1. other output voltages are available on request. please contact a on semiconductor semiconductor representative . fan 48623 vout pgnd c out l1 pg 0.47h 2x22f vin 10f sw vsel en c in + battery system load agnd byp
www.onsemi.com 2 FAN48623 ? 2500 ma synchronous tinyboost? regulator with bypass mode typical application figure 2. block diagram table 1. recommended components component description vendor parameter typ. unit l1 0.47 h, 2 0% , 5.3 a, 2520 toko: dfe252010p - r47 m l 0.47 h dcr ( ser ies r) 27 m ? tdk: c1608x5r1a106m c 10 f cout 2 x 22 f, 20%, 10 v, x5r, 0603 tdk: c1608x5r1a226m080a c c 44 f en l1 q2 vin sw c in gnd q1 q1b q1a pg c out q3 q3b q3a vsel byp bypass control modulator logic and control vout synchronous rectifier control
www.onsemi.com 3 FAN48623 ? 2500 ma synchronous tinyboost? regulator with bypass mode pin configuration figure 3. top - through view (bumps dow n) figure 4. bottom view (bumps up) pin definitions pin # name description a1 en enable . when this pin is high, the circuit is enabled. a2 pg pow er good . this is an open - drain output. pg is actively pulled low if output falls out of regulation due to overload or if thermal protection threshold is exceeded. a3, a4 v in input voltage . connect to li - ion battery input pow er source. b1 v sel output voltage sel ect . when boost is running, this pin can be used to select the output voltage. b 3, b4 v out output voltage . place c out as close as possible to the device. c1 byp bypass . this pin can be used to activate forced bypass mode. when this pin is low, the bypass sw itches (q3 and q1) are turned on and the ic is otherw ise inactive. c3 , c4 sw sw itching node . connect to inductor. d1 a gnd analog ground . this is the signal ground reference for the ic. all voltage levels are measured w ith respect to this pin. ag nd should be connected to pgnd at a single point. d2 ? d4 pgnd pow er ground . this is the pow er return for the ic. the c out bypass capacitor should be returned w ith the shortest path possible to these pins. b2, c2 nc no internal connection . note: bumps are present and should be tied to pgnd . vin vsel pg agnd pgnd nc sw nc vout en b1 b2 c2 a1 a2 b3 a3 c3 d1 d2 d3 c1 a4 b4 c4 d4 byp b 4 a 4 d 4 c 4 b 3 c 3 d 3 a 3 b 2 a 2 c 2 d 2 a 1 c 1 d 1 b 1
www.onsemi.com 4 FAN48623 ? 2500 ma synchronous tinyboost? regulator with bypass mode absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stres ses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v in v in input voltage - 0.3 6. 5 v v out v out output voltage 6. 0 v v sw sw node voltage dc - 0.3 6.0 v transient: 10 ns, 3 mhz - 1.0 8.0 other pins - 0.3 6. 5 ( 2 ) v esd electrostatic discharge protection level human body model, ansi/esda/jedec js - 001 - 2012 2.0 kv charged device model per jesd22 - c1 01 1. 5 t j junction temperature - 40 +150 c t stg storage temperature - 65 +150 c t l lead soldering temperature, 10 seconds +260 c no t e : 2. lesser of 6. 5 v or v in + 0.3 v. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. on semiconductor does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. unit v in supply voltage 2.5 4 .5 v i out output current 0 2 5 00 ma t a ambient temperature - 40 +85 c t j junction temperature - 40 +125 c thermal properties junction - to - ambient thermal resistance is a function of application and board layout. this data is measured w ith four - layer on semiconductor evaluation boards (1 oz copper on all layers). special attention must be paid not to exceed junction temperature t j ( max) at a given ambient temperate t a . symbol parameter typical unit ja junction - to - ambient thermal resistance 60 c/w
www.onsemi.com 5 FAN48623 ? 2500 ma synchronous tinyboost? regulator with bypass mode electrical specifications unless otherw ise noted and per figure 1 minimum and maximum values are from v in =2. 5 v to 4.5 v and t a = - 40c t o +85c. typical values are at v in = 3.0 v and t a = 25 c for all output voltage options. symbol parameter conditions min. typ. max. unit i q v in quiescent current automatic bypass mode , v out _target =3. 3 v, v in =3.6 v 140 190 a boost mode , v out =3. 3 v , v in =3.0 v 1 35 180 a shutdow n , en=0 v , v in =3. 0 v 4 .0 12 .0 0.5 1.0 0.1 1.5 ? i pd weak current source pull - dow n by p, v sel , en 100 na v reg output voltage accuracy 2.5 v v in v out_target - 100 mv , dc, 0 to 2500 m a - 1 .0 4 .0 % 2.5 v 4.7 5.3 a i v_lim_ss boost valley current limit during sof t start v in =2.5 v, v out =3.3 v 2.6 a t ss sof t - start en high to regulation 50 ? load, v 300 s t rst fault restart timer 20 ms no t e : 3. minimum and maximum limits are verified by design, test, or statistical analysis. typical (typ.) numbers are not verified, but represent typical results .
www.onsemi.com 6 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics unless otherw ise specified , t a = 25c; circuit and components according to figure 1 . figure 5. efficiency vs. load current and input voltage, v out =3. 1 5 v figure 6. efficiency vs. load current and temperature, v in =3.0 v, v out =3. 1 5 v figure 7. efficiency vs. load current and input voltage, v out =3. 3 v figure 8. efficiency vs. load current and temperature, v in =3.0 v, v out =3. 3 v figure 9. efficiency vs. load current and input voltage, v out = 3.5 v figure 10. efficiency vs. load current and temperature, v in =3. 0 v, v out = 3.5 v 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) 2.5 vin 2.7 vin 3.0 vin 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) - 40c +25c +85c 82% 84% 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) 2.5 vin 2.7 vin 3.0 vin 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) - 40c +25c +85c 82% 84% 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) 2.5 vin 2.7 vin 3.0 vin 3.3 vin 86% 88% 90% 92% 94% 96% 98% 0 500 1000 1500 2000 2500 efficiency load current (ma) - 40c +25c +85c
www.onsemi.com 7 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherw ise specified , t a = 25c; circuit and components according to figure 1 . figure 11. efficiency vs. load current and input voltage, v out =5.0 v figure 12. efficiency vs. load current and temperature, v in =3.6 v, v out =5.0 v figure 13. output regulation vs. load current and input voltage, v out =3. 15 v figure 14. output regulation vs. load current and temperature, v in =3.0 v, v out =3. 15 v figure 15. output regulation vs. load current and input voltage, v out = 3.3 v figure 16. output regulation vs. load current and temperature, v in =3. 0 v, v out = 3.3 v 78% 80% 82% 84% 86% 88% 90% 92% 94% 96% 0 500 1000 1500 2000 2500 efficiency load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin 84% 86% 88% 90% 92% 94% 96% 0 500 1000 1500 2000 2500 efficiency load current (ma) - 40c +25c +85c - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) 2.5 vin 2.7 vin 3.0 vin - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) - 40c +25c +85c - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) 2.5 vin 2.7 vin 3.0 vin - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) - 40c +25c +85c
www.onsemi.com 8 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherw ise specified , t a = 25c; circuit and components according to figure 1 . figure 17. output regula tion vs. load current and input voltage , v out =3.5 v figure 18. output regulation vs. load current and temperature , v in =3.0 v, v out =3.5 v figure 19. output regulation vs. load current and input voltage, v out = 5.0 v figure 20. output regulation vs. load current and temperature, v in =3. 6 v, v out = 5.0 v figure 21. quiescent current vs. input voltage and temperature, v out = 3.15 v, auto bypass figure 22. quiescent current vs. input voltage and temperature, v out = 5.0 v, auto bypass - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) 2.5 vin 2.7 vin 3.0 vin 3.3 vin - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) - 40c +25c +85c - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin - 2.0% - 1.0% 0.0% 1.0% 2.0% 3.0% 4.0% 0 500 1000 1500 2000 2500 output regulation load current (ma) - 40c +25c +85c 100 120 140 160 180 200 2.5 3.0 3.5 4.0 4.5 quiescent current (ua) input voltage (v) - 40c +25c +85c 120 140 160 180 200 220 2.5 3.0 3.5 4.0 4.5 5.0 5.5 quiescent current (ua) input voltage (v) - 40c +25c +85c
www.onsemi.com 9 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherw ise specified, t a = 25c; circuit and components according to figure 1 . figure 23. quiescent curren t vs. input voltage and temperature , v out = 3.3 v, forced bypass figure 24. typical maxim um contin uous load vs. input voltage, temperature and output voltage figure 25. output ripple vs. load current and input voltage , v out =3.15 v figure 26. frequency vs. load current and input voltage, v out =3.15 v figure 27. output ripple vs. load current and input voltage, v out =3.3 v figure 28. frequency vs. load current and input voltage , v out =3. 3 v 0 2 4 6 8 10 12 2.5 3.0 3.5 4.0 4.5 quiescent current (ua) input voltage (v) - 40c +25c +85c 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 2.5 3.0 3.5 4.0 4.5 max continuous load (a) input voltage (v) 3.3vout, 25c 3.3vout, 60c 3.3vout, 85c 5.0vout, 25c 5.0vout, 60c 5.0vout, 85c 5.2vout, 25c 5.2vout, 60c 5.2vout, 85c 0 10 20 30 40 0 500 1000 1500 2000 2500 ripple (mv) load current (ma) 2.5 vin 2.7 vin 3.0 vin 0 500 1,000 1,500 2,000 2,500 0 500 1000 1500 2000 2500 frequency(khz) load current (ma) 2.5 vin 2.7 vin 3.0 vin 0 10 20 30 40 0 500 1000 1500 2000 2500 ripple (mv) load current (ma) 2.5 vin 2.7 vin 3.0 vin 0 500 1,000 1,500 2,000 2,500 0 500 1000 1500 2000 2500 frequency(khz) load current (ma) 2.5 vin 2.7 vin 3.0 vin
www.onsemi.com 10 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherw ise specified , t a = 25c; circuit and components according to figure 1 . figure 29. output ripple vs. load current and input voltage, v out =5.0 v figure 30. frequency vs. load current and input voltage , v out = 5.0 v figure 31. startup, 50 ? figure 32. startup, 50 ? figure 33. overload protection , v in = 3.0 v, v out = 5.0 v figure 34. output fault, v in =3.0 v, v out = 3.3 v 0 10 20 30 40 50 0 500 1000 1500 2000 2500 ripple (mv) load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin 0 500 1,000 1,500 2,000 2,500 3,000 0 500 1000 1500 2000 2500 frequency(khz) load current (ma) 2.5 vin 3.0 vin 3.6 vin 4.2 vin iin (500ma/div) v out (1v/div) en (2v/div) pg (5v/div) i in (500ma/div) v out (2v/div) en (2v/div) pg (5v/div) i l (2a/div) v out (1v/div) pg (2v/div) i l (2a/div) v out (1v/div) pg (2v/div) 100 s/div 100 s/div 50 s/div 5ms/div
www.onsemi.com 11 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode typical characteristics (continued) unless otherw ise specified , t a = 25c; circuit and components according to figure 1 figure 35. load transient, 150- 2000 m a, 10 s edge , v in =3 .0 v, v out = 3.3 v figure 36. load transient , 150- 1000 m a, 10 s edge , v in =3 .6 v, v out = 5.0 v figure 37. line transient, 3.0 - 3.6 v in , 10 s edge, 500 ma load, v out = 3.3 v figure 38. line transient, 2.7 - 3. 0 v in , 10 s edge, 500 ma load, v out = 3.3 v figure 39. v sel ste p, v in =3 v, v out =3.3 v, 500 ma load i out (1a/div) v out (200mv/div) i out (1a/div) v out (200mv/div) v out (200mv/div) v in(200mv/div) v out (50mv/div) v in(200mv/div) v out (100mv/div) v sel (2v/div) 3.3 v 5.0v 100
www.onsemi.com 12 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode circuit description fa n 48623 is a synchronous boost regulator, typically operating at 2.5 mhz in continuous cond uction mode (ccm), w hich occurs at moderate to heavy load current and low v in voltages. at light load, the regulator operates at discontinuous conduction mode (dcm) to maintain high efficiency. FAN48623 uses a current - mode modulator to achieve excellent tr ansient response and smooth transitions betw een ccm and dcm operation. the regulator includes a bypass mode that automatically activates w hen v in is above the boost regulator?s set point. table 2. operating states s tartup and s hutdown (en pin) if en is low , all bias circuits are off and the regulator is in shutdow n mode. during shutdow n, current flow is prevented from vin to vout, as w ell as reverse flow from vout to vin. during startup, keep dc current draw below 500 ma until the device successfully executes startup . it is recommended not to connect en directly to vin but u se a gpio voltage of 1.8 v to set the logic for the en pin. the follow ing table describes the startup sequence. table 3. boost startup sequence start mode entry ex it end mode timeout (s) lin1 v in > v uvlo , en=1 v out > v in - 300 mv ss timeo u t lin2 512 lin2 lin1 exit v out > v in - 300 mv ss timeo u t fa ul t 1024 ss lin1 or lin2 exit v out =v out _target bst l inear start up (lin) when en is high and v in > v uvlo , the regulator attempts to bring v out w ithin 300 mv of v in using the internal fixed current source from v in (q3). the current is limited to the lin1 (~1 a) set point. if v out reaches v in - 300 mv during lin1 mode, ss mode is initiated. otherw ise, lin1 times out after 512 s and lin2 mode is entered. in lin2 mode, the current source is incremented to approximately 2 a . if v out fails to reach v in - 300 mv after 1024 s , a fault state is declared. soft - start mode ( ss ) upon successful completion of the lin mode (v out > v in - 300 mv ) , ss mode begins and the regulator starts sw itching w ith boost valley current limited to 5 0 % of nominal level at b oost m ode. during ss mode , v out is ramped up by stepping the internal reference. if v out fails to reach the voltage required during the ss ramp sequence w ithin 64 s, a fault state is declared. boost mode (b st ) this is a normal operating state of the regulator. bypass mode (bps) if v in is ab ove v out_target w hen the ss mode successfully completes, the device transitions directly to bps mode. table 4. en and byp logic table en byp mode v out 0 0 shutdow n 0 1 shutdow n 0 1 0 forced bypass v in 1 auto bypass v out_target or v in (if v in > v out_target ) f aul t state the regulator enters the fault state under any of the follow ing conditions: ? v out fails to achieve the voltage required to advance from lin state to ss state. ? v out fails to achieve the voltage required to advance from ss state to bst state. ? boost valley current limit triggers for 2 ms during the bst state. ? v in to v out voltage drop exceeds 160 mv during bps state. ? v in < v uvlo if a fault is triggered, the regulator stops sw itching and presents a high - impedance path betw een v in and v out . after w aiting 20 ms , a n automatic restart is attempted. power good pow er good is defined as a 0 - fa ult, 1 - power good, open- drain out put. the p ow er g ood pin ( pg) signal s w hen the regulator has successfully completed soft - start w ith no faults occurr ing . pow er g ood also functions as a w arning flag for high die temperature. ? pg is released high w hen the soft - start sequence is successfully completed. ? a ny fa ult state causes pg to be de - asserted. ? pg is not asserted during forced bypass exit to boost mode until the soft - start sequence is successfully completed. mode description invoked when lin linear startup v in > v out ss sof t - start mode v in v out _target
www.onsemi.com 13 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode over - temperature when t he die temperature exceeds 125 c , pg d e - asserts and the output remains regulated . pg is r e - asserted w hen the device cools by approximately 20c. the regulator shuts dow n if the die temperature exceeds 150c. restart occurs w hen the ic has cooled by approximately 20c. automatic bypass in normal opera tion, the device automatically transitions from boost mode to bypass mode if v in goes above v out _target . in bypass mode, the device fully enhances both q1 and q3 to provide a very low impedance path from vin to vout. en t r y in to the bypass mode is triggered w hen v in > v out _target and no sw itching has occurred during the past 10 s. to soften the entry in to bypass mode, q3 is driven as a linear current source for the first 5 s. bypass mode exit is triggered w hen v out reaches v out _target . during automatic bypass mode, the device is short - circuit protected by voltage comparator tracking the voltage drop from v in to v out ; if the drop exceeds 160 mv , a fault state is declared. with sufficient load to enforce ccm operation, the bypass mode to boost mode tra nsition occurs at the target v out . the bypass mode exit threshold has a 50 mv hysteresis imposed at v out to prevent cycling betw een modes. the corresponding input voltage at the transition point is: ( 1 ) the bypass mode entry threshold has a 30 mv hysteresis imposed at v out to prevent cycling betw een modes. the transition from boost mode to bypass mode occurs at the target v out + 30 mv . the corresponding input voltage is: ( 2 ) forced bypass forced bypass mode is activated by pulling byp pin low. forced bypass mode initiate s w ith a current limit on q3 and then proceeds to the bypass mode w ith both q1 and q3 fully enhanced . to prevent reverse current to the battery, t he device w aits until output discharges below v in before entering forced bypass mode. after the transition is complete, most of the internal circuitry is disabled to minimize quiescent current. ocp , uv lo and otp are inacti ve in forced bypass mode. by pulling byp pin high, the part transitions from forced bypass mode to boost mode. during the transition, q1 is off and q3 is driven as a linear current source for the first 5 s before entering boost mode. . mv 50 r || ) r dcr ( i v v byp ) on ( ds p ) on ( ds l load out in ? + ? + + + ? +
www.onsemi.com 14 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode application information output capacitance (c out ) stability the effective capacitance (c eff ( 4 ) ) of small, high - value, ceramic capacitors decrease as bias voltage increases , as illustrated in figure 40 . figure 40. c eff f or 22 s table operation is guaranteed w ith the minimum value of c eff (c eff(min) ) , as outlined in table 5 . table 5. minimum c eff required for stability operating conditions c eff(min) ( 3.15 0 to 2 5 00 9 5 .0 0 to 2 5 00 6 no t e : 4. c eff varies w ith manufacturer, material, and case size. inductor selection recommended nominal inductance value is 0.47 h. the fa n 48623 employs valley - current limiting . p eak inductor current can reach 6.5 a for a short duration during overload conditions. saturation effects cause the inductor current ripple to become higher under high loading as only the valley of the inductor current ripple is controlled. startup inrush current limit input current limiting is in effect during soft - start, w hich limits the current available to charge c out and any additional capacitance on the v out line. if the output fails to achieve regulation w ithin the set limit , a fault occurs, causing the circuit to shut dow n then restar t after 20 ms . if the total combined output capacitance is very high, the circuit may not start on the first attempt, but eventually achieves regulation if no load is present. if a high - current load and high capacitance are both present during soft - start, the circuit may fail to achieve regulation and continually attempts soft - start, only to have the output capacitance discharged by the load w hen in a fault state. output voltage ripple output voltage ripple is inversely proportional to c out . during t on , w hen the boost sw itch is on, all load current is supplied by c out . output ripple is calculated as: and ( 3 ) therefore: ( 4 ) and ( 5 ) ( 6 ) as can be seen from equation (5 ) , the maximum v ripple occurs w hen v in is at minimum and i load is at maximum . voltage at vout for applications w here a foreign voltage source could be applied at vout, care should be taken to en sure v out never exceeds the absolute maximum rating. layout recommendations the layout recommendations below highlight various layers using different colors. to minimize spikes at v out , c out must be placed as close as possible to pgnd and vout, as show n in figure 41 . for thermal reasons, it is s uggested to maximize the pour area for all planes other than sw. especially the ground pour should be set to fill all available pcb surface area and tied to internal layers w ith a cluster of thermal vias. figure 41. layout recommendation re fer to the section below for detailed layout recommendations for each layer. 0 4 8 12 16 20 24 0 1 2 3 4 5 6 7 8 9 10 capacitance (uf) dc bias ( v ) out ) ( c i t v load on p p ripple ? = ? ? ? ? ? ? ? ? ? ? ? = ? = out in sw sw on v v t d t t 1 out ) ( 1 c i v v t v load out in sw p p ripple ? ? ? ? ? ? ? ? ? ? ? = ? sw sw f t 1 =
www.onsemi.com 15 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode figure 42. top layer ? layer 2 should be a solid ground layer, to shield vout from capacitive coupling of the fast edges of sw node. ? logic signals can be routed on this layer. figure 43. layer 2 figure 44. layer 3 put as many as possible vias connected to ground plane(layer 2), to help dissipate heat. vout trace should be as wide and as short as possible, for low impedance. the ground area should be made as large as possible to help dissipate heat. vin trace should go through cin before going to vin pins. connect agnd directly to gnd layer through a via. sw trace should be as wide and as short as possible, and be isolated with gnd area from any other sensitive traces.
www.onsemi.com 16 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode product - specific dimensions product d e x y FAN48623uc 315 x 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc32jx 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc 33 x 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc35 x 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc 36f x 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc50x 1.810 0.030 1.810 0.030 0.305 0.305 FAN48623uc 50g x 1.810 0.030 1.810 0.030 0.305 0.305
www.onsemi.com 17 FAN48623 ? 2500 ma synchronous tinyboost ? regulator with bypass mode physical dimensions figure 45. 16- ball, 4x4 array, 0.4 m m pitch, 250 m ball, wafer - level chip - scale package (wlcsp) notes a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerance per asme y14.5m, 1994. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 586 39 microns (547-625 microns). f. for dimensions d,e,x, and y see product datasheet. g. drawing filname: mkt-uc016af rev1 bottom view side views top view recommended land pattern ball a1 index area 1 2 3 4 a b c d seating plane 16x a1 0.005 c a b f (nsmd pad type) ?0.2600.02 0.40 0.40 (x) 0.018 (y) 0.018 0.625 0.547 0.06 c 0.05 c e d f 0.3780.018 0.2080.021 0.03 c 2x 0.03 c 2x e d b c a 0.40 0.40 (?0.21) cu pad (?0.30) solder mask opening
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